1. Field of the Invention
The present invention discloses a method of detecting connection defects in a memory and a memory capable of detecting connection defects thereof, and more particularly, a method and a memory for detecting connection defects in the memory according to relations between input voltages on global word lines and corresponding currents.
2. Description of the Prior Art
Please refer to FIG. 1, which illustrates connection defects occurring on word lines of a conventional memory. In FIG. 1, there are two neighboring sub word line drivers M1 and M2 included by a same memory, wherein the sub word line driver M1 includes a P-type MOSFET P1 and an N-type MOSFET N1, and the sub word line driver M2 includes a P-type MOSFET P2 and an N-type MOSFET N2. The sub word line drivers M1 and M2 are respectively biased by a voltage source Vpp and a ground GND. The sub word line driver M1 is connected to a first sub word line W1, and the sub word line driver M2 is connected to a second sub word line W2.
As shown in FIG. 1, when gates of the P-type MOSFET P1 and the N-type MOSFET N1 are connected to a low-voltage-level input signal provided by a decoder, and when gates of the P-type MOSFET P2 and the N-type MOSFET N2 are connected to a high-voltage-level input signal provided by the decoder, a high voltage level occurs on the first sub word line W1, and a low voltage level occurs on the second sub word line W2, where a symbol L indicates a low voltage level in FIG. 1, and a symbol H indicates a high voltage level in FIG. 1.
However, when there is a connection defect, i.e. a short circuit, between the first sub word line W1 and the second sub word line W2, so that a DC leakage path is introduced, as shown in FIG. 1, the low voltage level previously on the second sub word line W2 will be replaced by the high voltage level on the first sub word line W1, and it will introduce errors in operations of the memory. The errors worsen when more DC leakage paths are introduced between sub word lines of the memory, tending to lead to reduced accuracy of operations of the memory.